Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applicability and numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
The principal elements of a typical MOS semiconductor device are illustrated in FIG. 1. The device generally includes a gate electrode 101, which acts as a conductor, to which an input signal is typically applied via a gate terminal (not shown). Heavily doped source 103 and drain 105 regions are formed in a semiconductor substrate 107 and are respectively connected to source and drain terminals (not shown). A channel region 109 is formed in the semiconductor substrate 107 beneath the gate electrode 101 and separates the source 103 and drain 105 regions.
The source/drain regions 103 and 105, illustrated in FIG. 1, are lightly-doped-drain (LDD) structures. LDD structures include lightly-doped, lower conductivity regions 106 near the channel region 109 and heavily-doped, higher conductivity regions 103 and 105 typically connected to the source/drain terminals. Generally, the LDD structures are typically formed by making two implants in the substrate. The first dopant is implanted adjacent the gate electrode 101 at relatively low concentration levels to form the lightly-doped regions 106. Spacers 102 are then formed on sidewalls of the gate electrode 101 and a second dopant is implanted into the active regions at higher concentration levels to form the heavily-doped regions 103 and 105. The substrate is typically annealed to drive the dopant in the heavily-doped regions deeper into the substrate 107.
The channel is typically lightly doped with a dopant type opposite to that of the source 103 and drain 105 regions. The gate electrode 101 is physically separated from the semiconductor substrate 107 by an insulating layer 111, typically an oxide layer such as SiO.sub.2. The insulating layer 111 is provided to prevent current from flowing between the gate electrode 101 and the semiconductor source region 103, drain region 105 or channel region 109.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode 101, a transverse electric field is set up in the channel region 109. By varying the transverse electric field, it is possible to modulate the conductance of the channel region 109 between the source region 103 and drain region 105. In this manner an electric field controls the current flow through the channel region 109. This type of device is commonly referred to as a MOS field-effect-transistors (MOSFET).
Semiconductor devices, like the one described above, are used in large numbers to construct most modern electronic devices. In order to increase the capability of such electronic devices, it is necessary to integrate even larger numbers of such devices into a single silicon wafer. As the semiconductor devices are scaled down (i.e., made smaller) in order to form a larger number of devices on a given surface area, the structure of the devices and fabrication techniques used to make such devices must be altered.
One important step in the manufacture of MOS devices is the formation of the gate electrode. The gate electrode is typically formed by depositing a layer of polysilicon and selectively removing portions of the polysilicon layer, using well-known photolithography and etching techniques. These conventional techniques for forming gate electrodes however impose limitations on the minimum width of the gate electrode. The resolution of the photolithography process, in particular, imposes limitations on the minimum width of the gate electrode. As the thresholds for minimum thickness are reached, the ability to further scale down the semiconductor devices is hindered.